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74HC595D封裝SO16信美盛8位鎖存移位寄存器邏輯芯片

8-bit serial-in, serial or parallel-out shift register with outputlatches;

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產(chǎn)品介紹

Product index

The 74HC595; 74HCT595 is an 8-bit serial-in/serial or parallel-out shift register with a storage register and 3-state outputs. Both the shift and storage register have separate clocks. The device features a serial input (DS) and a serial output (Q7S) to enable cascading and an asynchronous reset MR input. A LOW on MR will reset the shift register. Data is shifted on the LOW-to-HIGH transitions of the SHCP input. The data in the shift register is transferred to the storage register on a LOW-to-HIGH transition of the STCP input. If both clocks are connected together, the shift register will always be one clock pulse ahead of the storage register. Data in the storage register appears at the output whenever the output enable input (OE) is LOW. A HIGH on OE causes the outputs to assume a high-impedance OFF-state. Operation of the OE input does not affect the state of the registers. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.

訂購(gòu)信息

ordering information

器件類目

產(chǎn)品型號(hào)

封裝描述

環(huán)境溫度

應(yīng) 用

絲印

邏輯IC

74HC595D

SO16

40~+125℃

從串行到并行的數(shù)據(jù)轉(zhuǎn)換、遙控保持寄存器

74HC595D

波形和廁所電路

Waveforms and test circuit

resource/images/d276e6d6a1d54f4f9a3f87adfb07408e_2.jpg

產(chǎn)品特性

Product characteristics

8-bit serial input
8-bit serial or parallel output

Storage register with 3-state outputs
100 MHz (typical) shift out frequency

應(yīng)用范圍

Scope of application

: 交換機(jī)

: 智能電表

: 液晶電視

: 路由器

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